On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard

In this paper we investigate the design of macro-cell generators of division and square root floating-point operators. The number representation used in our operators is the IEEE-754-1985 standard for binary floating-point numbers. The design and implementation of the generators rely on a powerful multiview layout synthesis tool called GenOptim. This CAD tool is able to output a set of different descriptions for several VLSI technologies as well as FPGAs. The division and square root operators described in this paper use the signedbinary-digit representation. We start first by describing the operators for the significand, then we investigate the IEEE floating-point operators. All along this paper, and wherever appropriate, we present the implementation results using the GenOptim environment.